Protective circuit for a power amplifier

ABSTRACT

A protective circuit for a push-pull power amplifier comprises a load current-detecting resistor connected between the emitters of two transistors jointly constituting the power amplifier, a switch connected between an intermediate point on the load current-detecting resistor and the ground to shut off load current, a load resistance-detecting circuit for detecting the resistance of the load, and a driving circuit for causing the switch to be opened by an output from the load resistance-detecting circuit when the resistance of the load falls below a prescribed level. The load resistance-detecting circuit includes means for drawing out a first signal from one end of the load current-detecting resistor and, means for drawing out a second signal with lower potential than the first signal from the other end of the detecting resistor. Further, control means is provided for controlling the potential of the first signal according to that of the second signal, thereby increasing the potential difference between the first and second signals above a prescribed value when the resistance of the load falls below a predetermined value. The driving circuit which is supplied with the first and second signals opens the switch when the potential difference between both signals rises above a prescribed level.

BACKGROUND OF THE INVENTION

This invention relates to a protective circuit for protecting a push-pull type power amplifier, and more particularly to a protective circuit for a power amplifier which can decrease voltage impressed on a semiconductor element constituting the protective circuit.

An audio power amplifier used to date has the arrangement shown in FIG. 1. According to the prior art audio power amplifier, a load current-detecting resistor R_(E) (R_(E) =r_(E) +r_(E)) is connected between the emitter of a transistor of first conductivity type whose collector is connected to a positive power source +V_(CC) and the emitter of a transistor of second conductivity type whose collector is connected to a negative power source -V_(EE). A switch S is connected between an intermediate point on the resistor R_(E) and a load L (speaker SP), one end of which in grounded. A collector-emitter circuit of a transistor Q₃ for detecting the resistance of the load L, for example, the short-circuiting thereof is connected through a resistor between the intermediate point on the resistor R_(E) and the positive power source +V_(CC). The base of the transistor Q₃ is connected to a junction of resistors Ra, Rb collectively constituting an attenuator. A coil 17 for operating the switch S is connected to the positive power source +V_(CC) through a driving transistor Q₄. The base of this driving transistor Q₄ is supplied with an output from the collector of the transistor Q₃. Where the load L is shortcircuited, the transistor Q₄ is put into operation to open the switch S, thereby protecting the power amplifier. This protective operation is undertaken when the following formula is satisfied:

    r.sub.E I.sub.0 -αv.sub.0 ≧V.sub.TH

where:

r_(E) =resistance of the resistor r_(E) of FIG. 1

I₀ =load current

α=coefficient defined mainly by the resistances Ra, Rb of the attenuator of FIG. 1

v₀ =interterminal voltage of the load L

V_(TH) =threshold voltage of the transistor Q₃, namely, a detecting level of the load resistance.

As apparent from the above formula, the switch S is immediately opened when the load is short-circuited, and the load resistance is substantially reduced to zero to allow the passage of large load current.

Where the protective circuit is integrated, it is necessary to use a semiconductor element of low withstand voltage and reduce the power consumption of the protective circuit. In this connection, the transistor Q₃ of the prior art protective circuit of FIG. 1 is discussed below. The voltage applied between the collector and emitter of the transistor Q₃ varies between the voltage +V_(CC) of the positive power source and the voltage -V_(EE) of the negative power source, therefore the withstand voltage BV_(CEO) between the collector and emitter regions is required to have as large a value as V_(CC) +V_(EE), where, therefore, the protective circuit is integrated, the withstand voltage of the transistor Q₃ has to be raised to the above-mentioned high level. This means that a large chip has to be used, increasing the cost of an integrated protective circuit. Further drawbacks of the prior art protective circuit are that if high voltage has to be impressed on a semiconductor element, power consumption will rise, making it necessary to use a package of low thermal resistance; special means should be provided to promote heat dissipation; and the internal resistance of the semiconductor element itself should be decreased to admit of application of small operating current. Therefore, the arrangement of the prior art protective circuit shown in FIG. 1 can not be regarded as adapted for integration.

It is accordingly the object of this invention to provide a protective circuit for a power amplifier which can be formed of a semiconductor element having a relatively low withstand voltage.

SUMMARY OF THE INVENTION

According to this invention, there is provided a protective circuit which comprises a load currentdetecting resistor connected between two transistors jointly constituting a push pull power amplifier for detecting the load current of the power amplifier; a load connected to the power amplifier through the load current-detecting resistor; a switch for shutting off the load current; a load resistance-detecting circuit for detecting the resistance of the load; and a driving circuit for causing the switch to be opened by an output from the load resistance-detecting circuit when the load resistance falls to a lower level than prescribed; wherein the load resistance-detecting circuit comprises a circuit means for drawing out a first signal from one end of the load current-detecting resistor, circuit means for drawing out a second signal of lower potential than the first signal from the other end of the load current-detecting resistor, and control circuit means, which, when the load has a higher resistance than prescribed holds the potential difference between the first and second signals to be lower than a predetermined level by causing the potential of the first signal to drop by the second signal of lower potential than the first signal, and, when the load has a lower resistance than prescribed, increases the potential difference between the first and second signals over the predetermined level; and the driving circuit is supplied with the first and second signals, and includes circuit means for opening the switch, when the potential difference between the first and second signals has a larger value than the predetermined value.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows the arrangement of the prior art protective circuit for a power amplifier;

FIG. 2 indicates the arrangement of a protective circuit according to one embodiment of this invention which protects a power amplifier by detecting a load resistance during the positive halfwave period of load current;

FIG. 3 sets forth the arrangement of a protective circuit according to another embodiment of the invention which protects a power amplifier by detecting a load resistance during the positive and negative halfwave periods of load current;

FIG. 4 is a diagram of the driving circuit of FIG. 3;

FIG. 5 presents the arrangement of another type of protective circuit for a power amplifier, only the detecting circuit of which is different from that of FIG. 3.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 2, a detecting resistor R_(E) (R_(E) =2r_(E)) for detecting load current I₀ is connected between the emitter of an NPN transistor Q₁ and that of a PNP transistor Q₂. The base of each of said transistors Q₁, Q₂ receives an input signal. Positive voltage is impressed from a positive power source +V_(CC) on the collector of the NPN transistor Q₁. Negative voltage is supplied from a negative power source -V_(EE) to the collector of the PNP transistor Q₂. A switch S for cutting off a load current is connected between an intermediate point on the resistor R_(E) and a load L (speaker), one end of which is grounded. The switch S is actuated by a coil 17 through which current passes. Reference numeral 11 denotes a detecting circuit for detecting load resistance, and reference numeral 12 represents a driving circuit for driving the switch S. A potential at the junction 10a between the emitter of the NPN transistor Q₁ and resistor R_(E) is indicated by Vu; a potential at the junction 10b between the emitter of the PNP transistor Q₂ and resistor R_(E) by V_(L) ; a potential at an intermediate point of the resistor R_(E), numely, a nongrounded point 10c of the load L by v₀ ; and load current by I₀. The junction 10a and a point 15 are connected together through a resistor R₁. A first signal V₁ is drawn out from the terminal 15. The junction 10b and point 16 are connected together through a resistor R₂. A second signal V₂ is drawn out from the point 16. The point 15 is connected to the base of a transistor Q₁₁, whose collector is connected through a resistor R₆ to a positive power source +B having a lower voltage than +V_(CC), and whose emitter is connected to the point 16. A diode D₂ of the indicated polarity is connected between the points 15, 16.

The point 15 is grounded through diodes D₃ and D₄ with the indicated polarity and the point 16 is grounded through diodes D₅ and D₆ with the indicated polarity. The point 16 is connected to the base of a transistor Q₁₂ whose collector is connected to the positive power source +B, and whose emitter is grounded through a resistor R₃ and diode D₁ of the indicated polarity. The base of a transistor Q₁₃ is connected to a junction between the resistor R₃ and diode D₁ ; the collector thereof is connected to the point 15 and to the point 16 through the diode D₂ of the indicated polarity; and the emitter thereof is grounded. The base-emitter circuit of the transistor Q₁₃ is connected in parallel to the diode D₁ to form a current mirror. The collector of the transistor Q₁₁ is connected to the base of a transistor Q₁₄, whose emitter is connected to the positive power source +B and whose collector is grounded through a resistor R₇, and is also connected to the base of a transistor Q₁₅ : The collector of this transistor Q₁₅ is connected to the positive power source +B through a resistor R₈ and also to the base of a transistor Q₁₆ through a resistor R₉. The emitter of the transistor Q₁₅ is grounded. The collector of the transistor Q₁₆ is connected to the positive power source +B through the coil 17 for driving the switch S and the emitter thereof is grounded. A capacitor C₁ is connected between the base of the transistor Q₁₆ and the ground.

There will not be described the operation of the embodiment of FIG. 2 For better understanding, brief description is given of the case where the load L has a prescribed resistance and the case where the load L is short-circuited. Description is first given of the case where the load has a normal resistance, and the nongrounded terminal has a positive polarity. In this case, there result Vu>v₀ and V_(L) =v₀. Accordingly, the transistors Q₁₂, Q₁₃ are in active regions. Referring to the transistor Q₁₃, current I₂ flows through the resistor R₁ in the indicated direction. Therefore, the potential V₁ at the point 15 decreases from the potential Vu by a voltage drop at the resistor R₁. Accordingly, a potential difference V₁ -V₂ between the potential V₁ at the point 15 and the potential V₂ at the point 16 can be made to fall short of a threshold voltage V_(BE) between the base and emitter of the transistor Q₁₁. This arrangement enables the transistor Q₁₁ to be nonconducting, and in consequence the transistors Q₁₄, Q₁₅ to be nonconducting and the transistor Q₁₆ to be conducting. The switch S is closed when current is conducted through the coil 17, and is opened when no current passes through the coil 17. Therefore, the switch remains closed when the load has a higher resistance than prescribed.

Where the load L is short-circuited, a voltage drop appears at the junction 10a due to short circuit current running through the detecting resistor R_(E). As the result, the voltages V₀, V_(L) are reduced to zero, the transistors Q₁₂, Q₁₃ are rendered nonconductive and current I₂ ceases to run. Therefore, the potential V₁ at the point 15 is increased to the potential Vu at the junction 10a. Since the potential difference V₁ -V₂ increases over the threshold voltage V_(BE) of the transistor Q₁₁, the transistor Q₁₁ is rendered conducting when the transistors Q₁, Q₂ are supplied with a signal. In this case, the transistors Q₁₄, Q₁₅ are rendered conducting and the transistor Q₁₆ is rendered nonconducting, and the switch is opened.

There will now be described the general case where the load L has an optional resistance. The potential Vu at the junction 10a is expressed by the following equation:

    Vu=r.sub.E I.sub.0 +V.sub.0                                (1)

Assuming v₀ ≧2V_(BE) (V_(BE) denotes a voltage between the base and emitter or threshold voltage of the transistor Q₁₁) and with the ratio between current I₁ flowing through the diode D₁ and current I₂ flowing through the transistor Q₁₃ set at N, namely, I₁ =NI₂, then the base potential V₁ of the transistor Q₁₁ is expressed by the following equation: ##EQU1## Since V₂ =v₀, a potential difference V₁ -V₂ between the base and emitter of the transistor Q₁₁ is expressed by the following equation: ##EQU2## When the potential difference V₁ -V₂ increases over V_(BE), the transistor Q₁₁ is rendered conducting and the switch S is opened. The above equation (3) may be rewritten as follows ##EQU3##

As seen from the above equation (4), where an output voltage v₀ has a high level, large current can be conducted through the output transistors of a power amplifier where said putput voltage v₀ has a low level, the protective ciucuit is operated, even when small current flows through the output transistors of the power amplifier.

In the region expressed by the following equation (5) where the output voltage v₀ has a high level ##EQU4## the following equation results: ##EQU5## Derived from the above equation (6) is the following equation: ##EQU6##

It is seen from the above equation (7) that the resistance R_(L) of the load L is equal to or smaller than (NR₃ /R₁ )r_(E), the protective circuit is put into operation.

Referring to FIG. 2, the diode D₂ prevents the transmission of excess back bias between the base and emitter of the transistor Q₁₁. A group of diodes D₃ and D₄ suppresses the supply of excess back bias to the base of the transistor Q₁₁, and a group of diodes D₅ and D₆ suppresses the supply excess back bias to the emitter of the same transistor Q₁₁.

The transistor Q₁₂ acts as a sort of a buffer element substantially to eliminate the effect of voltage drop at the resistor R₂ connected between the junction 10b and point 16, and may therefore be omitted. Further, it is possible to use a differential amplifier in place of the transistor Q₁₁. This arrangement enables the potential difference V₁ -V₂ to be detected more minutely. Namely, the transistor Q₁₁ detects the potential difference V₁ -V₂ substantially to the extent of 600 mV, where as the differential amplifier detects the potential difference V₁ -V₂ to the extent of about 100 mV.

The embodiment of FIG. 2 is designed to detect load resistance during the positive halfwave period of output current. Where the polarity of the diodes and transistor is reversed, then the embodiment can be so modified as to detect load resistance during the negative halfwave period of output current. Further, where it is desired to detect load resistance only during the positive halfwave period of output current, then the resistor R₂ may obviously be connected to the point 10c in place of the junction 10b.

It is seen from the foregoing embodiment that this invention enables a withstand voltage demanded for the transistor Q₁₁ to be lower than a sum of absolute values of power source voltage levels +V_(CC) and -V_(EE), and in consequence withstand voltage demanded for other transistors included in a protective circuit to be lower than V_(CC) and V_(EE). Therefore, this invention decrease the power consumption of a protective circuit. For the foregoing reason, a protective circuit embodying this PG,13 invention can be easily integrated. Where the resistors R₁, R₂ are provided as external elements of an integrated protective circuit, then the level for detecting a load resistance can be easily set.

There will now be described by reference to FIG. 3 a protective circuit according to another embodiment which can detect load resistance during the positive and negative halfwave periods of an output voltage v₀. This embodiment is characterized in that the first and second signals are drawn out through the first and second attenuators from the corresponding terminals of a detecting resistor, thereby decreasing a withstand voltage demanded for the transistors constituting a protective circuit.

Referring to FIG. 3, one end 10a of a load currentdetecting resistor R_(E) is connected to a first attenuator ATT₁ consisting of resistors R₁₁, R₁₅. A first signal V₁ is conducted through a junction 20 between both resistors R₁₁, R₁₅ and also through a resistor R₁₂ to be drawn out at a terminal 15. The other end 10b of the load current-detecting resistor R_(E) is connected to a second attenuator consisting of resistors R₁₃, R₁₆. A second signal V₂ passes through a junction 22 between both resistors R₁₃, R₁₆ and also through a resistor R₁₄ to be drawn out at a terminal 16. A load L, one end of which is grounded is connected to an intermediate point 10c on the resistor R_(E) through a switch S. A voltage v₀ is impressed between both terminals of the load L. Connected between the free ends of the resistors R₁₅, R₁₆ are a group of diodes D₁₁ -D₁₂ and another group of diodes D₁₃ -D₁₄ with opposite polarities as shown in FIG. 3. The base of a PNP transistor Q₁₈ is connected to the free end of the resistor R₁₅, and the base-emitter circuit thereof is connected in parallel to the diode D₁₃, thereby constituting a current mirror circuit. The collector of the PNP transistors Q₁₈ is connected to the output terminal 16 of the second signal V₂. The base of an NPN transistor Q₁₉ is connected to the free end of the resistor R₁₆, and the base-emitter circuit thereof is connected in parallel to the diode D₁₄, thereby forming a current mirror circit. The collector of the NPN transistor Q₁₉ is connected to the output terminal 15 of the first signal V₁. The emitters of the transistors Q₁₈, Q₁₉ are jointly connected to the junction of the series-connected group of diodes D₁₁ -D₁₂ and also to the junction of the series-connected group of diodes D₁₃ -D₁₄, and further grounded. The diode D₁₁ is rendered conducting during the positive halfwave period of load current. The diode D₁₂ is operated during the negative halfwave period of load current. The diode D₁₁ actuates the attenuator ATT₁ during the positive halfwave period of load current the diode D₁₄ puts the attenuator ATT₂ into operation during the negative halfwave period of load current. The output terminal 18 of the driving circuit 12a is connected to one end of the driving coil 17 of the switch S. The other end of the coil 17 is grounded. The driving circuit indicated by referential numeral 12 in FIG. 2 and that shown in FIG. 4 may be used as a driving circuit 12a shown in FIG. 3.

Referring to FIG. 4, the base of an NPN transistor Q₂₁ is connected to the output terminal 15 of the first signal V₁, the collector thereof to the positive power source +B, and the emitter thereof to the negative power source -B through a resistor R₁₈, NPN transistor Q₂₅ and resistor R₁₉ in turn. NPN transistors Q₂₃, Q₂₄ jointly constitute a differential amplifier. The collector of the transistor Q₂₃ is directly connected to the positive power source +B. The collector of the transistor Q₂₄ is connected to the positive power source +B through the corresponding collector resistor. The emitter of both transistors Q₂₃, Q₂₄ are jointly connected to the nagative power source -B through an NPN transistor Q₂₇. The base of the transistor Q₂₂ is connected to the output terminal 16 of the second signal; the collector thereof directly to the positive power source +B; and the emitter thereof is connected to the base of the transistor Q₂₄, and also to the negative power source -B through an NPN transistor Q₂₆. The base of a PNP transistor Q₂₈ is connected to the collector of the transistor Q₂₃, and the emitter thereof is connected to the nongrounded end of the driving coil 17 of the switch S through the output terminal 18. A constant current source 20, one end of which is grounded, is connected to the negative power source -B through the indicated diode. An output from the constant current source 20 is supplied in common to the bases of transistors Q₂₅, Q₂₇, Q₂₆ arranged in the order mentioned.

Reverting to FIG. 3, a potential V_(1a) at the output terminal 20 of the first attenuator ATT₁ and a maximum potantial V_(2a) at the output terminal 22 of the second attenuator ATT₂ are expressed by the following equations respectively with a voltage drop at the diodes D₁₁ to D₁₄ disregarded. ##EQU7## Therefore, source voltages +B, -B required for the driving circuit 12a are expressed as follows: ##EQU8## Assuming +V_(CC) =50 V, -V_(EE) =-50 V, and ##EQU9## the equation of +B≧10 V and -B≧-10 V are satisfied. The transistors constituting the driving circuit 12a have only to be provided with a withstand voltage of 24 V, even if a margin of ±20 V is allowed. Therefore, it will well serve the purpose if the transistors have a withstand voltage of 30 V. With the prior art protective circuit of FIG. 1, the transistor Q₃ is impressed with a voltage of ±50 V. That is, the transistor Q₁₃ must have a withstand voltage of 100 V. Therefore, the protective circuit of this invention arranged as shown in FIG. 3 is obviously more adapted for integration. To effect said integration, it is better to set the resistors R₁₁, R₁₃ outside of an integrated protective circuit.

A potential difference V₁ -V₂ between the first signal V₁ and the second signal V₂ which arises during the positive halfwave period of load current is expessed by the following equation (8) (assuming R₁₁ =R₁₃ and R₁₅ =R₁₆): ##EQU10## where, Na is a ratio between current running through the diode D₁₄ and current flowing through the transistor Q₁₉. Said ratio can generally be defined changing a ratio between the areas of the emitters of the diode D₁₄ and transistor Q₁₉ during their manufacture. V_(BE) denotes a voltage impressed across the base and emitter of the transistor Q₁₉, namely a threshold voltage thereof. The potential difference V₂ -V₁ between the potential V₂ of the second signal and the potential V₁ of the first signal can be determined during the negative halfwave period of load current by modifying the above equation (8). In this case, it is advised to cause Na to represent a ratio between current flowing through the diode D₁₃ and current conducted through the transistor Q₁₈.

The potentials V_(u), V_(L) of the emitters of the transistors Q₁, Q₂ jointly constituting a power amplifier which appear during the positive halfwave period of load voltage (load current) are expressed as follows:

    V.sub.u =r.sub.E ·I.sub.0 +V.sub.0

    V.sub.L =V.sub.0

Where, therefore, the driving circuit 12a is designed to produce an output in case of V₁ -V₂ ≧V_(th) (V_(th) represents a detecting voltage of the driving circuit), then the follwoing equation (9) results: ##EQU11## where 1/K denotes ##EQU12##

If the resistances of the respective resistors and Na are so defined as to satisfy 1/K v₀ >V'_(th) then there results r_(E) I₀ >1/K v_(O) and in consequence the following formula (10):

    K·r.sub.E ≧R.sub.L

It is seen from the above formula (10) that where the load resistance R_(L) has a smaller value than K·r_(E), then the driving circuit 12a can be operated. The parallel connected diodes D₁₁, D₁₃ and the parallel connected diodes D₁₂, D₁₄ have opposite polarities to each other. The resistors R₁₅, R₁₆ are designed to be operated during the positive and negative halfwave periods of load current respectively. Therefore, load resistance can be detected during the positive or negative halfwave period of load current. The resistors R₁₁, R₁₂, R₁₅ decrease the potential of the first signal during the positive halfwave period of load current as does the resistor R₁ of FIG. 2. The resistors R₁₃, R₁₄, R₁₆ act in the same manner during the negative halfwave period of load current. Since a group of the resistors R₁₁, R₁₅ and a group of resistors R₁₃, R₁₆ can effect a voltage drop without the resistors R₁₂, R₁₄ during the positive and negative halfwave periods of load current respectively, the last mentioned two resistors R₁₂, R₁₄ can be omitted.

Referring to FIG. 3, where the load L has a higher resistance than prescribed, the first signal V₁ has its voltage decreased during the positive halfwave period of load current by current passing through the transistor Q₁₉ controlled by the signal V_(2a) and resistors R₁₁, R₁₂. However, the voltage of the second signal V₂ does not drop, because the transistor Q₁₈ is not rendered conducting. As the result, the transistors Q₂₁, Q₂₃ are rendered nonconducting and the transistor Q₂₈ is rendered conducting. Therefore the switch S is held in closed state. Where the load L is short-circuited, then the transistor Q₁₉ is rendered nonconducting to prevent current from running through the resistors R₁₁, R₁₂, thereby raising the potential of the first signal V₁ substantially up to the potential V_(u). At this time, the transistors Q₂₁, Q₂₃ are rendered conducting and the transistor Q₂₈ is turned off, thereby opening the switch S. The same operations as described above take place during the negative halfwave period of load current.

As described above, the embodiment of FIG. 3 can decrease a withstand voltage demanded for the semiconductor elements constituting a protective circuit.

A protective circuit utilizing a potential difference between the first and second signals may comprise the load resistance-detecting circuit of FIG. 5. A junction 10a is connected to a first attenuator ATT_(1a) formed of resistors R₂₁, R₂₂. The free end of the resistor 22 is grounded. A diode D_(A) of the indicated polarity is connected in parallel to the resistor R₂₂ through a resistor R₂₃. A first signal V₁ is drawn out from a junction 20 between the resistors R₂₁, R₂₂. A junction 10b is connected to a second attenuator ATT_(2a) formed of resistors R₂₄, R₂₅. The free end of the resistor R₂₅ is grounded. A diode D_(B) of the indicated polarity is connected through a resistor R₂₆ in parallel to the resistor R₂₅. A second signal V₂ is drawn out from a junction 22 between the resistors R₂₄, R₂₅. A driving circuit supplied with the first and second signals has the same arrangement as the driving circuit 12a of FIG. 3. Referring to FIG. 5, the diode D_(A) is rendered nonconducting and the diode D_(B) is rendered conducting during the negative halfwave period of load current. During the positive halfwave period of load current, the diode D_(A) is put into operation, and the diode D_(B) is turned off. Assuming R₂₁ =R₂₄, R₂₂ =R₂₅, R₂₃ =R₂₆ and ##EQU13## then the following equation results during the positive halfwave period of load current. ##EQU14##

When detected in case of V₁ -V₂ ≧0, the load resistance is expressed by the following equation: ##EQU15## where K' denotes ##EQU16##

The same result as described above is also obtained during the negative halfwave period of load current. 

What is claimed is:
 1. A protective circuit for a push-pull power amplifier including a load current-detecting resistor connected between two transistors jointly constituting said power amplifier for detecting the load current of said power amplifier; a load connected to said power amplifier through said load current-detecting resistor; a switch for shutting off said load current; a load resistance detecting circuit for detecting the resistance of said load; and a driving circuit for causing said switch to be opened by an output of said load resistance detecting circuit when the resistance of said load falls to a lower level than prescribed, characterized in that said load resistance-detecting circuit comprises circuit means for drawing out a first signal from one end of said load current-detecting resistor; circuit means for drawing out a second signal of lower potential than said first signal from the other end of said load current-detecting resistor; and control circuit means, which, when said load has a higher resistance than prescribed, holds the potential difference between said first and second signals to be lower than a predetermined level by causing the potential of said first singal to drop as a result of control on said first signal by said second signal of lower potential than said first signal, and, when said load has a lower resistance than prescribed, increases the potential difference between said first and second signals over said predetermined level; and said driving circuit is supplied with said first and second signals, and includes circuit means for opening said switch, when the potential difference between said first and second signals has a larger value than said predetermined value.
 2. The protective circuit according to claim 1, characterized in that said first signal has its potential decreased by current running through a resistor connected between said one end of said load current-detecting resistor and the terminal from which said first signal is drawn out.
 3. The protective circuit according to claim 1, characterized in that said load resistance-detecting circuit detects the load resistance during the positive halfwave period of load current.
 4. The protective circuit according to claim 1, characterized in that said load resistance-detecting circuit detects the load resistance during the negative halfwave period of load current.
 5. The protective circuit according to claim 1, characterized in that said load resistance-detecting circuit detects the load resistance during the positive halfwave period and also during the negative halfwave period of load current.
 6. The protective circuit according to claim 3 or 4, which further comprises diode means for limiting the amplitude of said first and second signals.
 7. The protective circuit according to claim 3, characterized in that said load resistance-detecting circuit comprises a first resistor having first and second ends wherein said first end is coupled to one end of said load current-detecting resistor whose potential increases during the positive halfwave period of the load current; a first terminal coupled to said second end of said first resistor for drawing out said first signal; a second resistor having first and second ends wherein said first end is coupled to the other end of said load current-detecting resistor whose potential falls below that of said first signal during the positive halfwave period of the load current; a second terminal coupled to said second end of said second resistor for drawing out said second signal; and a transistor having an emittercollector circuit coupled to said first terminal and which is so controlled as to be rendered conducting when the load has a higher resistance than prescribed thereby drawing current away from said first terminal and rendered nonconducting when the load has a lower resistance than prescribed.
 8. The protective circuit according to claim 5, characterized in that said load resistance-detecting circuit comprises a first attenuator connected to said one end of said load current-detecting resistor and constituted by a series circuit of a first resistor and a second resistor said first and second resistors each having first and second ends, said first end of said first resistor coupled to said one end of said load current-detecting resistor and said second end of said first resistor coupled two said first end of said second resistor; a second attenuator connected to said other end of said load current-detecting resistor and constituted by a series circuit of a third resistor and a fourth resistor; a first terminal connected to a junction between the first and second resistors of said first attenuator for drawing out said first signal; a second terminal connected to a junction between the third and fourth resistors of said second attenuator for drawing out said second signal; a first transistor of first conductivity type whose base is coupled to said second end of said second resistor of said first attenuator and whose collectoremitter circuit is coupled between said second terminal and ground; a second transistor of second conductivity type whose base is connected to said second end of said fourth resistor of said second attenuator, and whose collector-emitter circuit is coupled between said first terminal and ground; a pair of diodes connected in parallel with opposite polarities between the base and emitter of the first transistor; and another pair of diodes connected in parallel with opposite polarities between the base and emitter of the second transistor. 